\doxysection{C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/stm32h7xx\+\_\+hal\+\_\+dma.h File Reference}
\hypertarget{stm32h7xx__hal__dma_8h}{}\label{stm32h7xx__hal__dma_8h}\index{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_dma.h@{C:/Users/ASUS/Desktop/dm-\/ctrlH7-\/balance-\/9025test/Drivers/STM32H7xx\_HAL\_Driver/Inc/stm32h7xx\_hal\_dma.h}}


Header file of DMA HAL module.  


{\ttfamily \#include "{}stm32h7xx\+\_\+hal\+\_\+def.\+h"{}}\newline
{\ttfamily \#include "{}stm32h7xx\+\_\+hal\+\_\+dma\+\_\+ex.\+h"{}}\newline
\doxysubsubsection*{Classes}
\begin{DoxyCompactItemize}
\item 
struct \mbox{\hyperlink{struct_d_m_a___init_type_def}{DMA\+\_\+\+Init\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em DMA Configuration Structure definition. \end{DoxyCompactList}\item 
struct \mbox{\hyperlink{struct_____d_m_a___handle_type_def}{\+\_\+\+\_\+\+DMA\+\_\+\+Handle\+Type\+Def}}
\begin{DoxyCompactList}\small\item\em DMA handle Structure definition. \end{DoxyCompactList}\end{DoxyCompactItemize}
\doxysubsubsection*{Macros}
\begin{DoxyCompactItemize}
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_gaad4009390bfbe05a1bb7115d03c25a97}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+NONE}}~(0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga9882442c5f8f0170917934bbee1cc92d}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+TE}}~(0x00000001U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga019411712b9aee1d34b57d029a461fa4}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+FE}}~(0x00000002U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_gabac48184446aea8f467483382fc6689b}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+DME}}~(0x00000004U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga6cf6a5b8881ff36ed4316a29bbfb5b79}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+TIMEOUT}}~(0x00000020U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga5aaaad3b88a77147d1e3daa3a3ad9e60}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+PARAM}}~(0x00000040U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_gab7526e686427f26bf3b6af062d5a690b}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+NO\+\_\+\+XFER}}~(0x00000080U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga7432f31f9972e1c0a398a3f20587d118}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+NOT\+\_\+\+SUPPORTED}}~(0x00000100U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga14727cd304e8d655835ffa1ea1c94adb}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+SYNC}}~(0x00000200U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga3326e19157867d2fbee258b8327de03a}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+REQGEN}}~(0x00000400U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___error___code_ga2fdb3d3f17fe028f4b4f16c89f008a76}{HAL\+\_\+\+DMA\+\_\+\+ERROR\+\_\+\+BUSY}}~(0x00000800U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga83ec6137a0f228f2bdf392e0c583fff1}{DMA\+\_\+\+REQUEST\+\_\+\+MEM2\+MEM}}~0U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac360891b7aab34d72233a3f417d0d7ce}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR0}}~1U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga62fbe67101139967326da3599d4b5ad3}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR1}}~2U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga5d85c4cfb13afd83d7e6e75666951fd0}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR2}}~3U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga4c9ce5bc5fe8b5e64abf48302900819d}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR3}}~4U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gade59847dde13f9b1092058c365528c0c}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR4}}~5U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga9a1dbfcf9e21a240dcdc2196beadebad}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR5}}~6U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gad092da7081f04c078cd1784b0de6aafa}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR6}}~7U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaee263a6336a0571038e30ade8fb40a94}{DMA\+\_\+\+REQUEST\+\_\+\+GENERATOR7}}~8U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga4a6cd7654870571db4173048250a6b3c}{DMA\+\_\+\+REQUEST\+\_\+\+ADC1}}~9U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga1a7d20936f8a32b57cca42958a2a5f02}{DMA\+\_\+\+REQUEST\+\_\+\+ADC2}}~10U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga756b1484fc1d66c693855e56ee407d03}{DMA\+\_\+\+REQUEST\+\_\+\+TIM1\+\_\+\+CH1}}~11U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga910fb7ab9f1ba1ac8781f0f34aa2103d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM1\+\_\+\+CH2}}~12U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaaa1df2f6a5ea611f6d3acda54b18dd76}{DMA\+\_\+\+REQUEST\+\_\+\+TIM1\+\_\+\+CH3}}~13U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaa40c2a9f3556ca7a6f1602967885bb3d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM1\+\_\+\+CH4}}~14U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga7957b8a754a16a82af69b0ab4814d424}{DMA\+\_\+\+REQUEST\+\_\+\+TIM1\+\_\+\+UP}}~15U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac77cd13316478df217bb893c211001a6}{DMA\+\_\+\+REQUEST\+\_\+\+TIM1\+\_\+\+TRIG}}~16U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga64a65122ca64be9c98c2c5c5821f55d4}{DMA\+\_\+\+REQUEST\+\_\+\+TIM1\+\_\+\+COM}}~17U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga942f9250dc28b43e79f7f1d5eb403e9c}{DMA\+\_\+\+REQUEST\+\_\+\+TIM2\+\_\+\+CH1}}~18U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga1acbc6ec9a8ff268820a994405d925ce}{DMA\+\_\+\+REQUEST\+\_\+\+TIM2\+\_\+\+CH2}}~19U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga2afe9c04d4b6431dfe9d222bfa31595d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM2\+\_\+\+CH3}}~20U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga6a6febcbf8c622633d1e38886030f9dd}{DMA\+\_\+\+REQUEST\+\_\+\+TIM2\+\_\+\+CH4}}~21U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gab8ba97ec7a934d17b9459b44e8cf0aed}{DMA\+\_\+\+REQUEST\+\_\+\+TIM2\+\_\+\+UP}}~22U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga0e5fe6b185ba7a0e4ed5f83aa4b10051}{DMA\+\_\+\+REQUEST\+\_\+\+TIM3\+\_\+\+CH1}}~23U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf4ace678fe72c6ef2d4da3d463c578ee}{DMA\+\_\+\+REQUEST\+\_\+\+TIM3\+\_\+\+CH2}}~24U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaeb3c1120f809122498c94c999c798520}{DMA\+\_\+\+REQUEST\+\_\+\+TIM3\+\_\+\+CH3}}~25U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga47d84dd5253339f93f6763df565384a0}{DMA\+\_\+\+REQUEST\+\_\+\+TIM3\+\_\+\+CH4}}~26U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gafb2ce31d9f2f74794832744c27960835}{DMA\+\_\+\+REQUEST\+\_\+\+TIM3\+\_\+\+UP}}~27U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga9e5742296c16a0b4785f3d0ad8d5e896}{DMA\+\_\+\+REQUEST\+\_\+\+TIM3\+\_\+\+TRIG}}~28U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga50cb3999e2bcb214a7e9e54e497b8bae}{DMA\+\_\+\+REQUEST\+\_\+\+TIM4\+\_\+\+CH1}}~29U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac2633e2b727ef3ec3a7a0d40ecd7fab5}{DMA\+\_\+\+REQUEST\+\_\+\+TIM4\+\_\+\+CH2}}~30U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gad25edda0aef08d21cdaa5565a45d4a4d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM4\+\_\+\+CH3}}~31U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gacf85359a5beec3b59f94da9f8ed51479}{DMA\+\_\+\+REQUEST\+\_\+\+TIM4\+\_\+\+UP}}~32U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga3fc27e5db2750ff0cc4217e7042d17eb}{DMA\+\_\+\+REQUEST\+\_\+\+I2\+C1\+\_\+\+RX}}~33U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gae6a8777a94a0acfc921c7ef8f8c02a50}{DMA\+\_\+\+REQUEST\+\_\+\+I2\+C1\+\_\+\+TX}}~34U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga7d601d18f1844896c4ae7ac982133363}{DMA\+\_\+\+REQUEST\+\_\+\+I2\+C2\+\_\+\+RX}}~35U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga40b2e3f290a8119e44c3178ec838f522}{DMA\+\_\+\+REQUEST\+\_\+\+I2\+C2\+\_\+\+TX}}~36U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga9a001862dfa11acf6f1c6d42d4c9fbc1}{DMA\+\_\+\+REQUEST\+\_\+\+SPI1\+\_\+\+RX}}~37U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gad7da109a0ea57ac78d3995681e6ca452}{DMA\+\_\+\+REQUEST\+\_\+\+SPI1\+\_\+\+TX}}~38U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaa22f44ab4385095976ad2b20e298b344}{DMA\+\_\+\+REQUEST\+\_\+\+SPI2\+\_\+\+RX}}~39U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga950e16a3b720e87a596bc03e040a2e8e}{DMA\+\_\+\+REQUEST\+\_\+\+SPI2\+\_\+\+TX}}~40U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf7741f1f65db03cde614ef623d86b054}{DMA\+\_\+\+REQUEST\+\_\+\+USART1\+\_\+\+RX}}~41U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga89aead5f618253b1bc265116797b2150}{DMA\+\_\+\+REQUEST\+\_\+\+USART1\+\_\+\+TX}}~42U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaa5cdcaacbe97a60ff0c59610de3737e4}{DMA\+\_\+\+REQUEST\+\_\+\+USART2\+\_\+\+RX}}~43U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gafbbae78e38bfc3ee7c8e29db0b60fa5a}{DMA\+\_\+\+REQUEST\+\_\+\+USART2\+\_\+\+TX}}~44U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga1d5a8ff3b85225a6f5dc26d331e4c777}{DMA\+\_\+\+REQUEST\+\_\+\+USART3\+\_\+\+RX}}~45U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga2ec8dd5689b2be68939029ca8dca74db}{DMA\+\_\+\+REQUEST\+\_\+\+USART3\+\_\+\+TX}}~46U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga94f0e79a268007375b1706e297fdfb7d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM8\+\_\+\+CH1}}~47U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga4b988f8d2e9c45f9a79756c4f36217bb}{DMA\+\_\+\+REQUEST\+\_\+\+TIM8\+\_\+\+CH2}}~48U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga6ce66fa7a387a3cb86a8be98b475e1d4}{DMA\+\_\+\+REQUEST\+\_\+\+TIM8\+\_\+\+CH3}}~49U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaeec6c4b4f9fe5900b4b73b6904f7154f}{DMA\+\_\+\+REQUEST\+\_\+\+TIM8\+\_\+\+CH4}}~50U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga59df997f38ab3e8459fa5821a36c3497}{DMA\+\_\+\+REQUEST\+\_\+\+TIM8\+\_\+\+UP}}~51U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga5b5bf81b2e212b673af2169f9d793eaa}{DMA\+\_\+\+REQUEST\+\_\+\+TIM8\+\_\+\+TRIG}}~52U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga132f03758a41bb90cb9ca21cd4f40c0b}{DMA\+\_\+\+REQUEST\+\_\+\+TIM8\+\_\+\+COM}}~53U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga6c0b4d3faf9439ef99d5dbff2e1168ec}{DMA\+\_\+\+REQUEST\+\_\+\+TIM5\+\_\+\+CH1}}~55U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga6d48ce7cc39ff94c869cce40dd012c2f}{DMA\+\_\+\+REQUEST\+\_\+\+TIM5\+\_\+\+CH2}}~56U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga6dc6a64f0343a67f4a4ec69d8eaa65c1}{DMA\+\_\+\+REQUEST\+\_\+\+TIM5\+\_\+\+CH3}}~57U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga7d46adda709323fdbc398c738c242c7a}{DMA\+\_\+\+REQUEST\+\_\+\+TIM5\+\_\+\+CH4}}~58U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf89fd90dae109152f9d97169f52da086}{DMA\+\_\+\+REQUEST\+\_\+\+TIM5\+\_\+\+UP}}~59U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gad7118e94043851dd605a8c000facf026}{DMA\+\_\+\+REQUEST\+\_\+\+TIM5\+\_\+\+TRIG}}~60U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaa212ec66df2b680f324b37474171812b}{DMA\+\_\+\+REQUEST\+\_\+\+SPI3\+\_\+\+RX}}~61U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga9a6aa84a95ce45d13650ac87131e63b0}{DMA\+\_\+\+REQUEST\+\_\+\+SPI3\+\_\+\+TX}}~62U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga827ea80b6f1c35f2a3ffd4d1e1451e57}{DMA\+\_\+\+REQUEST\+\_\+\+UART4\+\_\+\+RX}}~63U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gabf32c8fa4474540f4b8bc8f660aea7ac}{DMA\+\_\+\+REQUEST\+\_\+\+UART4\+\_\+\+TX}}~64U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaa8fc93bdd98a129dc867dc9e3897c98c}{DMA\+\_\+\+REQUEST\+\_\+\+UART5\+\_\+\+RX}}~65U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gafebf523896f2a623f1fd9735ea778031}{DMA\+\_\+\+REQUEST\+\_\+\+UART5\+\_\+\+TX}}~66U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga47d2e89769ff9aefec00415688937836}{DMA\+\_\+\+REQUEST\+\_\+\+DAC1\+\_\+\+CH1}}~67U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga08df4ef86109a7c644996bc47b2517b9}{DMA\+\_\+\+REQUEST\+\_\+\+DAC1\+\_\+\+CH2}}~68U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga2ec342dcd5a985650237cc3542c0284d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM6\+\_\+\+UP}}~69U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga3e1c2b5f91c25d2998afdc661e77059d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM7\+\_\+\+UP}}~70U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gacc347cdf9d44a10d4341b99664ac876e}{DMA\+\_\+\+REQUEST\+\_\+\+USART6\+\_\+\+RX}}~71U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf5b86548247c3e52be689c1b414adf9a}{DMA\+\_\+\+REQUEST\+\_\+\+USART6\+\_\+\+TX}}~72U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga7595f70df42c6e8aac103254a2185750}{DMA\+\_\+\+REQUEST\+\_\+\+I2\+C3\+\_\+\+RX}}~73U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga89682da0574ca5b10f51546961acfce7}{DMA\+\_\+\+REQUEST\+\_\+\+I2\+C3\+\_\+\+TX}}~74U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf3fc9dd8027debebf2b5f20f386e1ba6}{DMA\+\_\+\+REQUEST\+\_\+\+DCMI}}~75U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga38adaaea4e8ad5a417f032421421c4a5}{DMA\+\_\+\+REQUEST\+\_\+\+CRYP\+\_\+\+IN}}~76U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gae09e7b2adaf7531391f5bf1e9a70f055}{DMA\+\_\+\+REQUEST\+\_\+\+CRYP\+\_\+\+OUT}}~77U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga800c78b6686f970c03946f012054c315}{DMA\+\_\+\+REQUEST\+\_\+\+HASH\+\_\+\+IN}}~78U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga847534ad6ed8b30f601d772f4897ba59}{DMA\+\_\+\+REQUEST\+\_\+\+UART7\+\_\+\+RX}}~79U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac21b8072c225b888642deca570782e6c}{DMA\+\_\+\+REQUEST\+\_\+\+UART7\+\_\+\+TX}}~80U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga1cc35e3fdabc040e21a4c3e2bef40126}{DMA\+\_\+\+REQUEST\+\_\+\+UART8\+\_\+\+RX}}~81U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga46357e16b568474e5804cf9066015d3b}{DMA\+\_\+\+REQUEST\+\_\+\+UART8\+\_\+\+TX}}~82U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga84d07ffb58eb6cd4fece482d275f99ed}{DMA\+\_\+\+REQUEST\+\_\+\+SPI4\+\_\+\+RX}}~83U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga1a4cf767080c4e9b82483799899b0fab}{DMA\+\_\+\+REQUEST\+\_\+\+SPI4\+\_\+\+TX}}~84U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga214d33809cb5268a9b350293aa959d9e}{DMA\+\_\+\+REQUEST\+\_\+\+SPI5\+\_\+\+RX}}~85U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac6465ac5d44c970c2540cee2cf8cc869}{DMA\+\_\+\+REQUEST\+\_\+\+SPI5\+\_\+\+TX}}~86U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga3b701db31c9561d7f3d78749ba43fcc6}{DMA\+\_\+\+REQUEST\+\_\+\+SAI1\+\_\+A}}~87U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gabddddda9f607b212a2917c0338029909}{DMA\+\_\+\+REQUEST\+\_\+\+SAI1\+\_\+B}}~88U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac3c47d721995193706d965ad20281b49}{DMA\+\_\+\+REQUEST\+\_\+\+SWPMI\+\_\+\+RX}}~91U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga0c5e822f3f27147b341b47f7a00fe92f}{DMA\+\_\+\+REQUEST\+\_\+\+SWPMI\+\_\+\+TX}}~92U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga7be24b9bf59133f163ac74ff0b378d1b}{DMA\+\_\+\+REQUEST\+\_\+\+SPDIF\+\_\+\+RX\+\_\+\+DT}}~93U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gae5b0cbf8d18b0e296d208660ffb959e3}{DMA\+\_\+\+REQUEST\+\_\+\+SPDIF\+\_\+\+RX\+\_\+\+CS}}~94U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gacf8c18dee9c2bc044b11bdb96a881d16}{DMA\+\_\+\+REQUEST\+\_\+\+DFSDM1\+\_\+\+FLT0}}~101U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga83a22d39ba0ed328a40d7df6172984ce}{DMA\+\_\+\+REQUEST\+\_\+\+DFSDM1\+\_\+\+FLT1}}~102U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga046ad34b8f6c8cd727575a837664c61b}{DMA\+\_\+\+REQUEST\+\_\+\+DFSDM1\+\_\+\+FLT2}}~103U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gabf12500344c8f70b0b23424d3d874665}{DMA\+\_\+\+REQUEST\+\_\+\+DFSDM1\+\_\+\+FLT3}}~104U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac96a3eea5b158e615022ca6a84b579fc}{DMA\+\_\+\+REQUEST\+\_\+\+TIM15\+\_\+\+CH1}}~105U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf59b3abfc0f0656bfeb4b5e7e05925e0}{DMA\+\_\+\+REQUEST\+\_\+\+TIM15\+\_\+\+UP}}~106U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gac4d698c9ee88a3cdf44677a64acccb53}{DMA\+\_\+\+REQUEST\+\_\+\+TIM15\+\_\+\+TRIG}}~107U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga0740b980b24ca2176a81d6614c7858c8}{DMA\+\_\+\+REQUEST\+\_\+\+TIM15\+\_\+\+COM}}~108U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga91d2ede71ca7c1a740aec828770f6c70}{DMA\+\_\+\+REQUEST\+\_\+\+TIM16\+\_\+\+CH1}}~109U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf17e949db32179dbe017497282a5260d}{DMA\+\_\+\+REQUEST\+\_\+\+TIM16\+\_\+\+UP}}~110U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga1aa03c25e04d6a91ff1ffaf221774022}{DMA\+\_\+\+REQUEST\+\_\+\+TIM17\+\_\+\+CH1}}~111U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaf0ff893545dc5eb65e029664746b8175}{DMA\+\_\+\+REQUEST\+\_\+\+TIM17\+\_\+\+UP}}~112U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga33679479c5a677f4912fe3b40a3d0a02}{BDMA\+\_\+\+REQUEST\+\_\+\+MEM2\+MEM}}~0U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga5fc9fedeeaf4c3289d086ef0ecc88ab8}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR0}}~1U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaaae14fba9f1546e0016b5cfecdc95ecf}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR1}}~2U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga0c59a32ba51f82b910207e24b1adf2d2}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR2}}~3U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga0a86f4bfbc129370a3c2dfb9a32750ec}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR3}}~4U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga179236463522079edcb5f0fa5fc4f802}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR4}}~5U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gad96fad5d911f3826c9286a44636a205d}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR5}}~6U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gabb38a77c9224b7c9211d3dbc345156eb}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR6}}~7U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gad7c02b81b52decfd198a8ba61d40b87c}{BDMA\+\_\+\+REQUEST\+\_\+\+GENERATOR7}}~8U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga56bc41d1fb994a31d183a289e176da44}{BDMA\+\_\+\+REQUEST\+\_\+\+LPUART1\+\_\+\+RX}}~9U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga143fee242d67d021d5db31d126aceeb1}{BDMA\+\_\+\+REQUEST\+\_\+\+LPUART1\+\_\+\+TX}}~10U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga6fdd3ee035e86f01283ab811eeac182d}{BDMA\+\_\+\+REQUEST\+\_\+\+SPI6\+\_\+\+RX}}~11U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga1923aa082fb4fad353d5fd726312630e}{BDMA\+\_\+\+REQUEST\+\_\+\+SPI6\+\_\+\+TX}}~12U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_gaa36be926e32fbeeea639a4649e1473e1}{BDMA\+\_\+\+REQUEST\+\_\+\+I2\+C4\+\_\+\+RX}}~13U
\item 
\#define \mbox{\hyperlink{group___d_m_a___request__selection_ga8ae2948a5bd0242e0435160688eda3e7}{BDMA\+\_\+\+REQUEST\+\_\+\+I2\+C4\+\_\+\+TX}}~14U
\item 
\#define \mbox{\hyperlink{group___d_m_a___data__transfer__direction_gacb2cbf03ecae6804ae4a6f60a3e37c12}{DMA\+\_\+\+PERIPH\+\_\+\+TO\+\_\+\+MEMORY}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___data__transfer__direction_ga9e76fc559a2d5c766c969e6e921b1ee9}{DMA\+\_\+\+MEMORY\+\_\+\+TO\+\_\+\+PERIPH}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gadca9547536f3d2f76577275964b4875e}{DMA\+\_\+\+Sx\+CR\+\_\+\+DIR\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___data__transfer__direction_ga0695035d725855ccf64d2d8452a33810}{DMA\+\_\+\+MEMORY\+\_\+\+TO\+\_\+\+MEMORY}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gac52c8d6ecad03bfe531867fa7457f2ae}{DMA\+\_\+\+Sx\+CR\+\_\+\+DIR\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___peripheral__incremented__mode_gab6d84e5805302516d26c06fb4497a346}{DMA\+\_\+\+PINC\+\_\+\+ENABLE}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga29c5d5c559dd14646fdc170e74f1f03b}{DMA\+\_\+\+Sx\+CR\+\_\+\+PINC}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___peripheral__incremented__mode_ga63e2aff2973d1a8f01d5d7b6e4894f39}{DMA\+\_\+\+PINC\+\_\+\+DISABLE}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___memory__incremented__mode_ga43d30885699cc8378562316ff4fed1cd}{DMA\+\_\+\+MINC\+\_\+\+ENABLE}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga771a295832a584a3777ede523a691719}{DMA\+\_\+\+Sx\+CR\+\_\+\+MINC}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___memory__incremented__mode_ga32625330516c188151743473fad97a33}{DMA\+\_\+\+MINC\+\_\+\+DISABLE}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___peripheral__data__size_ga55b8c8f5ec95f10d26d6c5b1c9136730}{DMA\+\_\+\+PDATAALIGN\+\_\+\+BYTE}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___peripheral__data__size_gac08bfd907442dba5358830b247135bcc}{DMA\+\_\+\+PDATAALIGN\+\_\+\+HALFWORD}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gab05cf3e3f7c9edae5c70d59b3b75b14f}{DMA\+\_\+\+Sx\+CR\+\_\+\+PSIZE\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___peripheral__data__size_gaad50e97cbc4a726660db9c3f42ac93b0}{DMA\+\_\+\+PDATAALIGN\+\_\+\+WORD}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga8f376d0900380a3045cbeadd6a037302}{DMA\+\_\+\+Sx\+CR\+\_\+\+PSIZE\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___memory__data__size_ga9ed07bddf736298eba11508382ea4d51}{DMA\+\_\+\+MDATAALIGN\+\_\+\+BYTE}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___memory__data__size_ga2c7355971c0da34a7ffe50ec87403071}{DMA\+\_\+\+MDATAALIGN\+\_\+\+HALFWORD}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga39adb60b3394b61366691b45b8c2b80f}{DMA\+\_\+\+Sx\+CR\+\_\+\+MSIZE\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___memory__data__size_ga8812da819f18c873249074f3920220b2}{DMA\+\_\+\+MDATAALIGN\+\_\+\+WORD}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaa5c2ef08ab52de52b4e1fd785f60e263}{DMA\+\_\+\+Sx\+CR\+\_\+\+MSIZE\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___d_m_a__mode_ga04941acfbbdefc53e1e08133cffa3b8a}{DMA\+\_\+\+NORMAL}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a__mode_ga4c4f425cba13edffb3c831c036c91e01}{DMA\+\_\+\+CIRCULAR}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gadc248dbc519cc580621cdadcdd8741fb}{DMA\+\_\+\+Sx\+CR\+\_\+\+CIRC}})
\item 
\#define \mbox{\hyperlink{group___d_m_a__mode_ga7974ee645c8e275a2297cf37eec9e022}{DMA\+\_\+\+PFCTRL}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga11f412d256043bec3e01ceef7f2099f2}{DMA\+\_\+\+Sx\+CR\+\_\+\+PFCTRL}})
\item 
\#define \mbox{\hyperlink{group___d_m_a__mode_gaccc83bb7f8aa42b64239afdb65e29fa1}{DMA\+\_\+\+DOUBLE\+\_\+\+BUFFER\+\_\+\+M0}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga53a1cde736b2afc5a394a67849f0c497}{DMA\+\_\+\+Sx\+CR\+\_\+\+DBM}})
\item 
\#define \mbox{\hyperlink{group___d_m_a__mode_ga10ef5902d35d6226c165e5b72ad6dcc4}{DMA\+\_\+\+DOUBLE\+\_\+\+BUFFER\+\_\+\+M1}}~((uint32\+\_\+t)(\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga53a1cde736b2afc5a394a67849f0c497}{DMA\+\_\+\+Sx\+CR\+\_\+\+DBM}} \texorpdfstring{$\vert$}{|} \mbox{\hyperlink{group___peripheral___registers___bits___definition_gadd36c677ee53f56dc408cd549e64cf7d}{DMA\+\_\+\+Sx\+CR\+\_\+\+CT}}))
\item 
\#define \mbox{\hyperlink{group___d_m_a___priority__level_ga0d1ed2bc9229ba3c953002bcf3a72130}{DMA\+\_\+\+PRIORITY\+\_\+\+LOW}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___priority__level_gad6fbeee76fd4a02cbed64365bb4c1781}{DMA\+\_\+\+PRIORITY\+\_\+\+MEDIUM}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga41b1b2f7bd6f0af932ff0fb7df9336b6}{DMA\+\_\+\+Sx\+CR\+\_\+\+PL\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___priority__level_ga6b2f5c5e22895f8b4bd52a27ec6cae2a}{DMA\+\_\+\+PRIORITY\+\_\+\+HIGH}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga81817adc8c0ee54dea0f67a1a9e8eb77}{DMA\+\_\+\+Sx\+CR\+\_\+\+PL\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___priority__level_gaed0542331a4d875d1d8d5b2878e9372c}{DMA\+\_\+\+PRIORITY\+\_\+\+VERY\+\_\+\+HIGH}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga14c115d71a4e3b3c4da360108288154c}{DMA\+\_\+\+Sx\+CR\+\_\+\+PL}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___f_i_f_o__direct__mode_gaec22b199f9da9214bf908d7edbcd83e8}{DMA\+\_\+\+FIFOMODE\+\_\+\+DISABLE}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___f_i_f_o__direct__mode_ga18709570bed6b9112520701c482fbe4b}{DMA\+\_\+\+FIFOMODE\+\_\+\+ENABLE}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga89406bb954742665691c0ac2f8d95ec9}{DMA\+\_\+\+Sx\+FCR\+\_\+\+DMDIS}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___f_i_f_o__threshold__level_ga4debbd5733190b61b2115613d4b3658b}{DMA\+\_\+\+FIFO\+\_\+\+THRESHOLD\+\_\+1\+QUARTERFULL}}~((uint32\+\_\+t)0x00000000U)
\item 
\#define \mbox{\hyperlink{group___d_m_a___f_i_f_o__threshold__level_gad2b071aa3a3bfc936017f12fb956c56f}{DMA\+\_\+\+FIFO\+\_\+\+THRESHOLD\+\_\+\+HALFFULL}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga63716e11d34bca95927671055aa63fe8}{DMA\+\_\+\+Sx\+FCR\+\_\+\+FTH\+\_\+0}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___f_i_f_o__threshold__level_gae1e4ba12bae8440421e6672795d71223}{DMA\+\_\+\+FIFO\+\_\+\+THRESHOLD\+\_\+3\+QUARTERSFULL}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gae3d780fc1222a183071c73e62a0524a1}{DMA\+\_\+\+Sx\+FCR\+\_\+\+FTH\+\_\+1}})
\item 
\#define \mbox{\hyperlink{group___d_m_a___f_i_f_o__threshold__level_ga5de463bb24dc12fe7bbb300e1e4493f7}{DMA\+\_\+\+FIFO\+\_\+\+THRESHOLD\+\_\+\+FULL}}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga44c16978164026a81f5b07280e800e7f}{DMA\+\_\+\+Sx\+FCR\+\_\+\+FTH}})
\item 
\#define {\bfseries DMA\+\_\+\+MBURST\+\_\+\+SINGLE}~((uint32\+\_\+t)0x00000000U)
\item 
\#define {\bfseries DMA\+\_\+\+MBURST\+\_\+\+INC4}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga1e3931a8f14ffe008b8717e1b3232fca}{DMA\+\_\+\+Sx\+CR\+\_\+\+MBURST\+\_\+0}})
\item 
\#define {\bfseries DMA\+\_\+\+MBURST\+\_\+\+INC8}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaf28eac7212392083bbf1b3d475022b74}{DMA\+\_\+\+Sx\+CR\+\_\+\+MBURST\+\_\+1}})
\item 
\#define {\bfseries DMA\+\_\+\+MBURST\+\_\+\+INC16}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga5c1174bff38faf5d87b71521bce8f84f}{DMA\+\_\+\+Sx\+CR\+\_\+\+MBURST}})
\item 
\#define {\bfseries DMA\+\_\+\+PBURST\+\_\+\+SINGLE}~((uint32\+\_\+t)0x00000000U)
\item 
\#define {\bfseries DMA\+\_\+\+PBURST\+\_\+\+INC4}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gadf0eee1ad1788868a194f95107057a16}{DMA\+\_\+\+Sx\+CR\+\_\+\+PBURST\+\_\+0}})
\item 
\#define {\bfseries DMA\+\_\+\+PBURST\+\_\+\+INC8}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga061207b2c654a0dd62e40187c9557eda}{DMA\+\_\+\+Sx\+CR\+\_\+\+PBURST\+\_\+1}})
\item 
\#define {\bfseries DMA\+\_\+\+PBURST\+\_\+\+INC16}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga502380abb155eb3b37a2ca9359e2da2e}{DMA\+\_\+\+Sx\+CR\+\_\+\+PBURST}})
\item 
\#define {\bfseries DMA\+\_\+\+IT\+\_\+\+TC}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga6ae47cc2cd2e985d29cb6b0bb65da1d7}{DMA\+\_\+\+Sx\+CR\+\_\+\+TCIE}})
\item 
\#define {\bfseries DMA\+\_\+\+IT\+\_\+\+HT}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_ga13a7fe097608bc5031d42ba69effed20}{DMA\+\_\+\+Sx\+CR\+\_\+\+HTIE}})
\item 
\#define {\bfseries DMA\+\_\+\+IT\+\_\+\+TE}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gaeee99c36ba3ea56cdb4f73a0b01fb602}{DMA\+\_\+\+Sx\+CR\+\_\+\+TEIE}})
\item 
\#define {\bfseries DMA\+\_\+\+IT\+\_\+\+DME}~((uint32\+\_\+t)\mbox{\hyperlink{group___peripheral___registers___bits___definition_gacaecc56f94a9af756d077cf7df1b6c41}{DMA\+\_\+\+Sx\+CR\+\_\+\+DMEIE}})
\item 
\#define {\bfseries DMA\+\_\+\+IT\+\_\+\+FE}~((uint32\+\_\+t)0x00000080U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+FEIF0\+\_\+4}~((uint32\+\_\+t)0x00000001U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+DMEIF0\+\_\+4}~((uint32\+\_\+t)0x00000004U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TEIF0\+\_\+4}~((uint32\+\_\+t)0x00000008U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+HTIF0\+\_\+4}~((uint32\+\_\+t)0x00000010U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TCIF0\+\_\+4}~((uint32\+\_\+t)0x00000020U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+FEIF1\+\_\+5}~((uint32\+\_\+t)0x00000040U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+DMEIF1\+\_\+5}~((uint32\+\_\+t)0x00000100U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TEIF1\+\_\+5}~((uint32\+\_\+t)0x00000200U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+HTIF1\+\_\+5}~((uint32\+\_\+t)0x00000400U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TCIF1\+\_\+5}~((uint32\+\_\+t)0x00000800U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+FEIF2\+\_\+6}~((uint32\+\_\+t)0x00010000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+DMEIF2\+\_\+6}~((uint32\+\_\+t)0x00040000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TEIF2\+\_\+6}~((uint32\+\_\+t)0x00080000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+HTIF2\+\_\+6}~((uint32\+\_\+t)0x00100000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TCIF2\+\_\+6}~((uint32\+\_\+t)0x00200000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+FEIF3\+\_\+7}~((uint32\+\_\+t)0x00400000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+DMEIF3\+\_\+7}~((uint32\+\_\+t)0x01000000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TEIF3\+\_\+7}~((uint32\+\_\+t)0x02000000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+HTIF3\+\_\+7}~((uint32\+\_\+t)0x04000000U)
\item 
\#define {\bfseries DMA\+\_\+\+FLAG\+\_\+\+TCIF3\+\_\+7}~((uint32\+\_\+t)0x08000000U)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL0}~((uint32\+\_\+t)0x00000001)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC0}~((uint32\+\_\+t)0x00000002)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT0}~((uint32\+\_\+t)0x00000004)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE0}~((uint32\+\_\+t)0x00000008)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL1}~((uint32\+\_\+t)0x00000010)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC1}~((uint32\+\_\+t)0x00000020)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT1}~((uint32\+\_\+t)0x00000040)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE1}~((uint32\+\_\+t)0x00000080)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL2}~((uint32\+\_\+t)0x00000100)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC2}~((uint32\+\_\+t)0x00000200)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT2}~((uint32\+\_\+t)0x00000400)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE2}~((uint32\+\_\+t)0x00000800)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL3}~((uint32\+\_\+t)0x00001000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC3}~((uint32\+\_\+t)0x00002000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT3}~((uint32\+\_\+t)0x00004000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE3}~((uint32\+\_\+t)0x00008000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL4}~((uint32\+\_\+t)0x00010000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC4}~((uint32\+\_\+t)0x00020000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT4}~((uint32\+\_\+t)0x00040000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE4}~((uint32\+\_\+t)0x00080000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL5}~((uint32\+\_\+t)0x00100000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC5}~((uint32\+\_\+t)0x00200000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT5}~((uint32\+\_\+t)0x00400000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE5}~((uint32\+\_\+t)0x00800000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL6}~((uint32\+\_\+t)0x01000000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC6}~((uint32\+\_\+t)0x02000000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT6}~((uint32\+\_\+t)0x04000000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE6}~((uint32\+\_\+t)0x08000000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+GL7}~((uint32\+\_\+t)0x10000000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TC7}~((uint32\+\_\+t)0x20000000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+HT7}~((uint32\+\_\+t)0x40000000)
\item 
\#define {\bfseries BDMA\+\_\+\+FLAG\+\_\+\+TE7}~((uint32\+\_\+t)0x80000000)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_gaadcee34f0999c8eafd37de2f69daa0ac}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+RESET\+\_\+\+HANDLE\+\_\+\+STATE}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Reset DMA handle state. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga8f0ff408d25904040b9d23ee7f6af080}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+FS}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Return the current DMA Stream FIFO filled level. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga93900b3ef3f87ef924eb887279a434b4}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+ENABLE}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Enable the specified DMA Stream. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_gafeef4c5e8c3f015cdecc0f37bbe063dc}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+DISABLE}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Disable the specified DMA Stream. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_gae3feef5ea50ff13a6a5b98cb353c87b0}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+TC\+\_\+\+FLAG\+\_\+\+INDEX}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Return the current DMA Stream transfer complete flag. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga0095f5f3166a82bedc67744ac94acfba}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+HT\+\_\+\+FLAG\+\_\+\+INDEX}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Return the current DMA Stream half transfer complete flag. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga5e765bb3b1c5fc9f1b1abbbb764250bc}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+TE\+\_\+\+FLAG\+\_\+\+INDEX}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Return the current DMA Stream transfer error flag. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga5878c3a1dbcf01e6840fffcf1f244088}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+FE\+\_\+\+FLAG\+\_\+\+INDEX}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Return the current DMA Stream FIFO error flag. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga23d1f282af3b9aa7aa396dcad94865d8}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+DME\+\_\+\+FLAG\+\_\+\+INDEX}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Return the current DMA Stream direct mode error flag. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga8779acdae52ce7746973df2b83704d10}{\+\_\+\+\_\+\+HAL\+\_\+\+BDMA\+\_\+\+GET\+\_\+\+GI\+\_\+\+FLAG\+\_\+\+INDEX}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Returns the current BDMA Channel Global interrupt flag. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga798d4b3b3fbd32b95540967bb35b35be}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+FLAG}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+FLAG\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Get the DMA Stream pending flags. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_gabc041fb1c85ea7a3af94e42470ef7f2a}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+CLEAR\+\_\+\+FLAG}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+FLAG\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Clear the DMA Stream pending flags. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga04039af9ae2375f5774d44ab4833628c}{DMA\+\_\+\+TO\+\_\+\+BDMA\+\_\+\+IT}}(\+\_\+\+\_\+\+DMA\+\_\+\+IT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga10896c6dfbdf3d44464a069b1721ca8b}{\+\_\+\+\_\+\+HAL\+\_\+\+BDMA\+\_\+\+CHANNEL\+\_\+\+ENABLE\+\_\+\+IT}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga8a533441ac435e67f8900ea093cedc62}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+STREAM\+\_\+\+ENABLE\+\_\+\+IT}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga2124233229c04ca90b790cd8cddfa98b}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+ENABLE\+\_\+\+IT}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Enable the specified DMA Stream interrupts. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_gafe490c84a1411bd6378b374d214dcb20}{\+\_\+\+\_\+\+HAL\+\_\+\+BDMA\+\_\+\+CHANNEL\+\_\+\+DISABLE\+\_\+\+IT}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_gaaa6db3b6d5a3382ec0f763a10b6f9369}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+STREAM\+\_\+\+DISABLE\+\_\+\+IT}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga2867eab09398df2daac55c3f327654da}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+DISABLE\+\_\+\+IT}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Disable the specified DMA Stream interrupts. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga9d152a1c740a622552b553a00699f772}{\+\_\+\+\_\+\+HAL\+\_\+\+BDMA\+\_\+\+CHANNEL\+\_\+\+GET\+\_\+\+IT\+\_\+\+SOURCE}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_gac164d54cf97c4dc75a26844a2c5f2f20}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+STREAM\+\_\+\+GET\+\_\+\+IT\+\_\+\+SOURCE}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga206f24e6bee4600515b9b6b1ec79365b}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+IT\+\_\+\+SOURCE}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+INTERRUPT\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Check whether the specified DMA Stream interrupt is enabled or not. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga448a8f809df86ccffae200ffd33d0a82}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+SET\+\_\+\+COUNTER}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+,  \+\_\+\+\_\+\+COUNTER\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Writes the number of data units to be transferred on the DMA Stream. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___exported___macros_ga082d691311bac96641dc35a17cfe8e63}{\+\_\+\+\_\+\+HAL\+\_\+\+DMA\+\_\+\+GET\+\_\+\+COUNTER}}(\+\_\+\+\_\+\+HANDLE\+\_\+\+\_\+)
\begin{DoxyCompactList}\small\item\em Returns the number of remaining data units in the current DMAy Streamx transfer. \end{DoxyCompactList}\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_ga7e2daff4a5cfc845cae7de93fec3dec2}{IS\+\_\+\+DMA\+\_\+\+REQUEST}}(REQUEST)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gae5165ee94946d497d4eda23f47ce9ea1}{IS\+\_\+\+BDMA\+\_\+\+REQUEST}}(REQUEST)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gae2b02e8e823854bcd7c5746cdd29e70d}{IS\+\_\+\+DMA\+\_\+\+DIRECTION}}(DIRECTION)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_ga72ef4033bb3bc2cdfdbe579083b05e32}{IS\+\_\+\+DMA\+\_\+\+BUFFER\+\_\+\+SIZE}}(SIZE)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_ga28762105b3f567c16ba79a47e68ff0fa}{IS\+\_\+\+DMA\+\_\+\+PERIPHERAL\+\_\+\+INC\+\_\+\+STATE}}(STATE)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gaa880f39d499d1e80449cf80381e4eb67}{IS\+\_\+\+DMA\+\_\+\+MEMORY\+\_\+\+INC\+\_\+\+STATE}}(STATE)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gad7916e0ae55cdf5efdfa68a09a028037}{IS\+\_\+\+DMA\+\_\+\+PERIPHERAL\+\_\+\+DATA\+\_\+\+SIZE}}(SIZE)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gac9e3748cebcb16d4ae4206d562bc804c}{IS\+\_\+\+DMA\+\_\+\+MEMORY\+\_\+\+DATA\+\_\+\+SIZE}}(SIZE)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gad88ee5030574d6a573904378fb62c7ac}{IS\+\_\+\+DMA\+\_\+\+MODE}}(MODE)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gaa1cae2ab458948511596467c87cd02b6}{IS\+\_\+\+DMA\+\_\+\+PRIORITY}}(PRIORITY)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gadb90a893aeb49fd4bc14af750af3837c}{IS\+\_\+\+DMA\+\_\+\+FIFO\+\_\+\+MODE\+\_\+\+STATE}}(STATE)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_gaeafc0d9e327d6e5b26cd37f6744b232f}{IS\+\_\+\+DMA\+\_\+\+FIFO\+\_\+\+THRESHOLD}}(THRESHOLD)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_ga921ebf06447dc036180fff50b7e4846a}{IS\+\_\+\+DMA\+\_\+\+MEMORY\+\_\+\+BURST}}(BURST)
\item 
\#define \mbox{\hyperlink{group___d_m_a___private___macros_ga7c60961178e2a32e9e364a220a8aca88}{IS\+\_\+\+DMA\+\_\+\+PERIPHERAL\+\_\+\+BURST}}(BURST)
\end{DoxyCompactItemize}
\doxysubsubsection*{Typedefs}
\begin{DoxyCompactItemize}
\item 
typedef struct \mbox{\hyperlink{struct_____d_m_a___handle_type_def}{\+\_\+\+\_\+\+DMA\+\_\+\+Handle\+Type\+Def}} {\bfseries DMA\+\_\+\+Handle\+Type\+Def}
\begin{DoxyCompactList}\small\item\em DMA handle Structure definition. \end{DoxyCompactList}\end{DoxyCompactItemize}
\doxysubsubsection*{Enumerations}
\begin{DoxyCompactItemize}
\item 
enum \mbox{\hyperlink{group___d_m_a___exported___types_ga9c012af359987a240826f29073bbe463}{HAL\+\_\+\+DMA\+\_\+\+State\+Type\+Def}} \{ \newline
\mbox{\hyperlink{group___d_m_a___exported___types_gga9c012af359987a240826f29073bbe463a9e7be73da32b8c837cde0318e0d5eed2}{HAL\+\_\+\+DMA\+\_\+\+STATE\+\_\+\+RESET}} = 0x00U
, \mbox{\hyperlink{group___d_m_a___exported___types_gga9c012af359987a240826f29073bbe463ad497944e6e72bc3ca904694b1098105a}{HAL\+\_\+\+DMA\+\_\+\+STATE\+\_\+\+READY}} = 0x01U
, \mbox{\hyperlink{group___d_m_a___exported___types_gga9c012af359987a240826f29073bbe463af7a0a2ca8de4e5be9e85b6a9073476ef}{HAL\+\_\+\+DMA\+\_\+\+STATE\+\_\+\+BUSY}} = 0x02U
, \mbox{\hyperlink{group___d_m_a___exported___types_gga9c012af359987a240826f29073bbe463ac2ce65c7cb2410c143b14e309ba83742}{HAL\+\_\+\+DMA\+\_\+\+STATE\+\_\+\+ERROR}} = 0x03U
, \newline
\mbox{\hyperlink{group___d_m_a___exported___types_gga9c012af359987a240826f29073bbe463af199cdb868cfd96fa97decb285643755}{HAL\+\_\+\+DMA\+\_\+\+STATE\+\_\+\+ABORT}} = 0x04U
 \}
\begin{DoxyCompactList}\small\item\em HAL DMA State structures definition. \end{DoxyCompactList}\item 
enum \mbox{\hyperlink{group___d_m_a___exported___types_gaee3245eea8fa938edeb35a6c9596fd86}{HAL\+\_\+\+DMA\+\_\+\+Level\+Complete\+Type\+Def}} \{ \mbox{\hyperlink{group___d_m_a___exported___types_ggaee3245eea8fa938edeb35a6c9596fd86a5314147c8ba21548763bf89446b78468}{HAL\+\_\+\+DMA\+\_\+\+FULL\+\_\+\+TRANSFER}} = 0x00U
, \mbox{\hyperlink{group___d_m_a___exported___types_ggaee3245eea8fa938edeb35a6c9596fd86ad0ba8bc74a2ae6dcdc3e316e8be0d5d8}{HAL\+\_\+\+DMA\+\_\+\+HALF\+\_\+\+TRANSFER}} = 0x01U
 \}
\begin{DoxyCompactList}\small\item\em HAL DMA Transfer complete level structure definition. \end{DoxyCompactList}\item 
enum \mbox{\hyperlink{group___d_m_a___exported___types_gafbe8b2bd9ce2128de6cdc08ccde7e8ad}{HAL\+\_\+\+DMA\+\_\+\+Callback\+IDType\+Def}} \{ \newline
\mbox{\hyperlink{group___d_m_a___exported___types_ggafbe8b2bd9ce2128de6cdc08ccde7e8ada7d4463d9db2e6d15282128b44ae08e12}{HAL\+\_\+\+DMA\+\_\+\+XFER\+\_\+\+CPLT\+\_\+\+CB\+\_\+\+ID}} = 0x00U
, \mbox{\hyperlink{group___d_m_a___exported___types_ggafbe8b2bd9ce2128de6cdc08ccde7e8ada4b1606f39a4eec41d958bc878719f046}{HAL\+\_\+\+DMA\+\_\+\+XFER\+\_\+\+HALFCPLT\+\_\+\+CB\+\_\+\+ID}} = 0x01U
, \mbox{\hyperlink{group___d_m_a___exported___types_ggafbe8b2bd9ce2128de6cdc08ccde7e8ada09feb1bab1c32b35afd27b9316958051}{HAL\+\_\+\+DMA\+\_\+\+XFER\+\_\+\+M1\+CPLT\+\_\+\+CB\+\_\+\+ID}} = 0x02U
, \mbox{\hyperlink{group___d_m_a___exported___types_ggafbe8b2bd9ce2128de6cdc08ccde7e8adac2e68a660d9830fa1e965482b9befbb9}{HAL\+\_\+\+DMA\+\_\+\+XFER\+\_\+\+M1\+HALFCPLT\+\_\+\+CB\+\_\+\+ID}} = 0x03U
, \newline
\mbox{\hyperlink{group___d_m_a___exported___types_ggafbe8b2bd9ce2128de6cdc08ccde7e8ada3e76bc89154e0b50333cc551bf0337a6}{HAL\+\_\+\+DMA\+\_\+\+XFER\+\_\+\+ERROR\+\_\+\+CB\+\_\+\+ID}} = 0x04U
, \mbox{\hyperlink{group___d_m_a___exported___types_ggafbe8b2bd9ce2128de6cdc08ccde7e8ada3059a9412e0624699e9123ba2bccdf3e}{HAL\+\_\+\+DMA\+\_\+\+XFER\+\_\+\+ABORT\+\_\+\+CB\+\_\+\+ID}} = 0x05U
, \mbox{\hyperlink{group___d_m_a___exported___types_ggafbe8b2bd9ce2128de6cdc08ccde7e8adac9935fd906719942d6b09cfd55e837f0}{HAL\+\_\+\+DMA\+\_\+\+XFER\+\_\+\+ALL\+\_\+\+CB\+\_\+\+ID}} = 0x06U
 \}
\begin{DoxyCompactList}\small\item\em HAL DMA Callbacks IDs structure definition. \end{DoxyCompactList}\end{DoxyCompactItemize}
\doxysubsubsection*{Functions}
\begin{DoxyCompactItemize}
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Init} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+De\+Init} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Start} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma, uint32\+\_\+t Src\+Address, uint32\+\_\+t Dst\+Address, uint32\+\_\+t Data\+Length)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Start\+\_\+\+IT} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma, uint32\+\_\+t Src\+Address, uint32\+\_\+t Dst\+Address, uint32\+\_\+t Data\+Length)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Abort} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Abort\+\_\+\+IT} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Poll\+For\+Transfer} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma, \mbox{\hyperlink{group___d_m_a___exported___types_gaee3245eea8fa938edeb35a6c9596fd86}{HAL\+\_\+\+DMA\+\_\+\+Level\+Complete\+Type\+Def}} Complete\+Level, uint32\+\_\+t Timeout)
\item 
void {\bfseries HAL\+\_\+\+DMA\+\_\+\+IRQHandler} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Register\+Callback} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma, \mbox{\hyperlink{group___d_m_a___exported___types_gafbe8b2bd9ce2128de6cdc08ccde7e8ad}{HAL\+\_\+\+DMA\+\_\+\+Callback\+IDType\+Def}} Callback\+ID, void(\texorpdfstring{$\ast$}{*}p\+Callback)(\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}\+\_\+hdma))
\item 
\mbox{\hyperlink{stm32h7xx__hal__def_8h_a63c0679d1cb8b8c684fbb0632743478f}{HAL\+\_\+\+Status\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Un\+Register\+Callback} (\mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma, \mbox{\hyperlink{group___d_m_a___exported___types_gafbe8b2bd9ce2128de6cdc08ccde7e8ad}{HAL\+\_\+\+DMA\+\_\+\+Callback\+IDType\+Def}} Callback\+ID)
\item 
\mbox{\hyperlink{group___d_m_a___exported___types_ga9c012af359987a240826f29073bbe463}{HAL\+\_\+\+DMA\+\_\+\+State\+Type\+Def}} {\bfseries HAL\+\_\+\+DMA\+\_\+\+Get\+State} (const \mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\item 
uint32\+\_\+t {\bfseries HAL\+\_\+\+DMA\+\_\+\+Get\+Error} (const \mbox{\hyperlink{group___d_m_a___exported___types_ga41b754a906b86bce54dc79938970138b}{DMA\+\_\+\+Handle\+Type\+Def}} \texorpdfstring{$\ast$}{*}hdma)
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
Header file of DMA HAL module. 

\begin{DoxyAuthor}{Author}
MCD Application Team 
\end{DoxyAuthor}
\begin{DoxyAttention}{Attention}

\end{DoxyAttention}
Copyright (c) 2017 STMicroelectronics. All rights reserved.

This software is licensed under terms that can be found in the LICENSE file in the root directory of this software component. If no LICENSE file comes with this software, it is provided AS-\/\+IS. 